Digi NS9750 Uživatelský manuál stáhnout pdf (Strana 10)

System configuration

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NS9750B-A1 Datasheet 03/2006

gpio[19] RESERVED. This pin must not be pulled to logic 0 until reset_done is a logic 1.

gpio[17], gpio[12],

gpio[10], gpio [8],

gpio[4]

PLL ND[4:0] (PLL multiplier, ND+1)

See Table 2: PLL ND[4:0].

gpio[2], gpio[0] PLL FS[1:0] (PLL frequency select)

gpio[2], [0] FS Divide by

10 00 1

11 01 2

00 10 4

01 11 8

1 1 0 1 0 32

0 0 1 0 0 31

1 1 0 0 0 30

1 1 0 0 1 29

1 1 1 1 0 28

1 1 1 1 1 27

1 1 1 0 0 26

1 1 1 0 1 25

1 0 0 1 0 24

1 0 0 1 1 23

1 0 0 0 0 22

1 0 0 0 1 21

1 0 1 1 0 20

1 0 1 1 1 19

1 0 1 0 0 18

1 0 1 0 1 17

0 1 0 1 0 16

0 1 0 1 1 15

0 1 0 0 0 14

0 1 0 0 1 13

Table 2: PLL ND[4:0]

Pin name Configuration bits

Table 1: Configuration pins— Bootstrap initialization

1 2 ... 5 6 7 8 9 10 11 12 13 14 15 ... 87 88

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Digi NS9750 Uživatelský manuál Strana 10